Computer Programming and Control Systems

Memory reference instructions

These are useful in order to perform operations on operand which are located in the main memory.

• AND → perform AND operation on memory word and accumulator. But directly we can't perform AND operation on memory word, so we have to transfer the content of memory word into data register. And in the next CP, AND operation will be performed on DR and AC (accumulator).
  DR ← M[AR]
  AC ← AC ∧ DR, SC ← 0
• ADD → Add he content of AC to memory word but we can't perform ADD operation directly with memory word because ALU only works wih DR and accumulator.
  DR ← M[AR]
  AC ← AC + DR, E ← C_out, SC ← 0
  If there is any output carry it will be transfered to flip-flop E.
• LDA → Load Memory word to Accumulator, but from the bus there is no connection to the accumulator (Bus output doesn't connect to the input of the accumulator) that's why we have to transfer memory word content to DR and from the DR we can transfer content to the AC.
  DR ← M[AR]
  AC ← DR, SC ← 0
• STA → Store Accumulator into memory.
  M[AR] ← AC
• BUN → Branch Unconditionaly (Jump Unconditionally). So without checking any condition, if we go from one statement to another statement.
  PC → AR, AC ← 0
• BSA → Branch and save Return address
  M[AR] ← PC, AR ← AR + 1
• ISZ → Increment and Skip if zero. If we need to increment the content of the memory and skip the next instruction if the memory word is 0.
  Problem - Memory has only two control inputs: 1- Write and 2- Read. Therefore, we can't directly perform a read operation on the memory. First, we have to transfer the memory word to the Data Register (DR). Then, in the next control cycle (CP), we increment the DR. Afterward, in the next CP, we load the DR content back into memory. Now, we can check whether the DR content is zero or not. If it is zero, then we skip the next instruction by incrementing the program counter value.
  DR ← M[AR]
  DR ← DR + 1
  M[AR] ← DR if(DR = 0) then PC ← PC + 1

Register Reference instructions

• These are mainly useful inorder to perform operations on the registers.
• We know the opcode value from 0 to 6 are memory reference instructions and in register reference instructions opcode is 1.
• Register reference instructions are executed when D₇I'T₃ (T₀, T₁, and T₂ are used for decoding and fetching) is active.
• The size of accumulator is 16 bit.

Some register reference instructions ↓

• CLA: Clear accumulator ⇒ AC ← 0
• CLE: Clear E (Extended flip-flop, used for storing carry generated during sum) ⇒ E ← 0
• CMA: Compliment accumulator ⇒ AC ← (AC)'
• CME: Compliment E ⇒ E ← E'
• CIR: Circular right shift ⇒ AC ← shr AC, E ← AC(0), AC(15) ← E
• CIL: Circular left shift ⇒ AC ← shl AC, E ← AC(15), AC(0) ← E
• INC: Increment the accumulator ⇒ AC ← AC + 1
• SPA: Skip the next instruction if accumulator is positive ⇒ if(AC(15) = 0 ) then PC ← PC + 1
• SNA: Skip the next instruction if accumulator is negative ⇒ if(AC(15) = 1) then PC ⇆ PC + 1
• SZA: Skip the next instruction if accumulator is zero ⇒ if(AC = 0) then PC ← PC + 1
• SZE: Skip the next instruction is E flip flop is zero ⇒ if(E = 0) then PC ← PC + 1
• HLT: Stop the program execution ⇒ S ← 0 ( S is start/stop flip flop)

Input-output Reference Instructions

• Let's see how data is transferred from input devices to output devices.
  
  The most common input device is keyboard. Whenever we type any character with the help of keyboard then the transmitter interface transmits the character to a register called INPR (input register). At INPR a flag called FGI is maintained. FGI value is set to 1 if INPR contains a character and if INPR doesn't contain any character then FGI will be cleared to 0. INPR passes that character to the accumulator. Next we have OUTR register which receives information from accumulator. At the OUTR register a flag called FGO is maintained which is intially set to 1. If OUTR contains a character then FGO will be cleared to 0 (it is reverse to the FGI). Receiver interface receives the character from the OUTR and provides that character to the monitor. So in this way transmission will be done.
• We know the size of the intruction format is 16 bit in which first 12 bit specifies I/O operations and opcode = 111 and address mode bit = 1. We can say the I/O instructions are executed when the decoders output D₇ and I = 1 is active.

Let's discuss the instructions

• INP: Input character to the accumulator ⇒ AC(0-7) ← INPR, FGI ← 0
  • Problem: size of INPR register is 8 bit and the size of accumulator is 16 bits, so for the most significance bit the data will be transfered.
  • Bits from 8-15 will be 0.
  • As the data is transfered to the accumulator, so the INPR register doesn't contain any value so the flag value will be set to 0.
• OUT: Output register gets the character from the accumulator ⇒ OUTR ← AC(0-7), FGO ← 0
  • OUTR register contains some value so FGO is 0.
• SKI: Skip the input flag ⇒ if(FGI = 1) then PC ← PC + 1
• SKO: Skip the output flag ⇒ if(FGO = 1) then PC ← PC + 1
• ION: Interrupt enable on ⇒ IEN ← 1
• IOFF: Interrupt off ⇒ IEN ← 0

Data transfer instructions

The instructions by which data is copied from one regiser/location to another.

• MOV: Data is copied from one register/location to another
  • MOV R1, R2: copy data from R2 (source register) to R1 (destination register)
    
  • MOV R, M: copy the content of memory location M into R (register)
    
  • MOV M, R: copy data from R (register) to M (memory location)
• MVI: Move immediate (we don't have to look for data, the data is already given), means data source is a data not a location.
  • MVI D 23H ⇒ copy 23H data to D register
  • MVI M 23H ⇒ copy 23H data to Memory M
• LDA: Load accumulator from memory
  • LDA F345H: copy data which is stored in F345H memory address.
    

Arithmetic instructions

• Keep in mind : we have to assume that one operand is always inside accumulator and second operand can be inside other registers (B, C, D, E, H, L).

Let's start with first instruction

• ADD R: addition of accumulator with any given register and store the result back to accumulator.
  • ADD R ⇒ A ← A + R
    
  • ADD M: addition of accumulator with data given inside the memory M.
• ADI R: add immediate (data is provided), add the given data to accumulator and store the result back to accumulator.
  • ADI F4H
• INR R: increment the value of given register.
  • INR R ⇒ increment the content stored in register R
• SUB R: subtract the content of R register from accumulator.
  • SUB C: A ← A - C, or we can say A ← A + 2's Compliment of C
• SUI 33H: subtract the immediate content from accumulator.
• DCR R: decrement the content of given register R.

Logical instruction

Some of logical instruction are ↓

• CMA: Compliment the content of accumulator and store the result back to accumulator.
  
• CMP R: compare content of register R with accumulator.
  • Note: content of neither A nor R is changed.
  • Simply content of register R is subtracted from accumulator and stored in temp register.
  • If content of temp register is +ve means accumulator content is greater else content of register R is greater (temp = 0, both are equal).

Assembler

• An assembler is a program that accepts a symbolic language program and produces its binary machine language equivalent.
• The input symbolic program is called the source program and the resulting binary program is called the object program.
• The assembler is a program that operates on character strings and produces an equivalent binary interpretation.

One more instruction we have to learn and those are Pseudo instruction.

• A pseudo instruction is not a machine instruction but rather an instruction to the assembler giving information about some phase of the translation.

Addition of two 8 bit Numbers

Algorithm ↓

1. Start the program by loading the first data into Accumulator.
2. Move the data to a register (B register).
3. Get the second data and load into Accumulator.
4. Add the two register contents.
5. Store the value of sum and carry in memory location.
6. Terminate the program

Source Code ↓

                    
Mnemonics    Operand     Explanation
------------------------------------------------------------------------
LDA           4150       Load the value to Accumulator.
MOV           B, AC      Move the content of Accumulator to B register.
LDA           4151       Load the value to Accumulator.
ADD           B          Add the value of register B to AC.
STA           4152       Store the value of Accumulator (SUM).
HLT                      Halt the program.
                    
                

Assembly Language program to subtract two numbers

                    
ORG 100  ;Origin of program is location 100
LDA SUB  ;Load subtrahend to AC
CMA      ;Complement AC
INC      ;Increment AC
ADD MIN  ;Add minuend to AC
STA DIF  ;Store difference
HLT      ;Halt computer
                    
                

Types of Assemblers

There are two main types of assemblers used in comoputer programming.

1. Single-pass assembler: A single-pass assembler, also referred to as a one-pass translator, is designed for efficiency and simplicity.
   • In this approach, the assembler reads the entire source code in a single pass or traversal.
   • As it reads the source code, it generates corresponding machine code on-the-fly without revisiting the code.
   • This means that each line of assembly code is processed and translated into machine code as it is encountered in the source file.
   • Single-pass assemblers are typically faster and require less memory compared to multi-pass assemblers.
   • However, they have limitations, such as not being able to handle forward references, which are references to symbols or labels that appear later in the code.
2. Multi-pass assembler: The multi-pass assembler takes a more comprehensive and methodical approach to assembly.
   • It scans the source code multiple times, iterating through it to resolve various aspects of the code.
   • The final pass, known as the synthesis pass, is where the assembler generates the machine code.
   • During the previous passes, it performs tasks such as collecting information about labels, symbols, and memory addresses, resolving forward references, and ensuring correct addressing modes.
   • Multi-pass assemblers are more capable and flexible in handling complex code structures and resolving dependencies between different parts of the code.
   • However, this thoroughness comes at the cost of increased processing time and memory usage, making multi-pass assemblers slower compared to single-pass assemblers.

Difference between Machine language and Assembly language

Program loops programming

A program loop is a sequence of instructions that are executed many times. The following is an example of a Fortan program that forms the sum of 100 integer numbers.

                    
  DIMENSION A(100)
  INTEGER SUM, A 
  SUM = 0
  DO 3 J = 1, 100
3 SUM = SUM + A(J)
                    
                

Statement number 3 is executed 100 times. A system program that translates a high-level program is called a compiler. Following table shows corresposnding assembly code of the program

                        
; Symbolic Program to Add 100 Numbers
S.N.      Assembly Code     Explanation 
1         ORG 100          ;Origin of program is HEX 100
2         LDA ADS          ;Load first address of operands in AC 
3         STA PTR          ;Store contents of AC in counter 
4         LDA NBR          ;Load minus 100 in AC 
5         STA CTR          ;Store contents of AC in counter 
6         CLA              ;Clear accumulator (AC = 0)
7         LOP ADD PTR 1    ;Add an operand to AC 
8         ISZ PTR          ;Increment pointer 
9         ISZ CTR          ;Increment counter 
10        BUN LOP          ;Repeat loop again 
11        STA SUM          ;Store sum 
12        HLT              ;Halt
                        
                    

Value update in various registers are shown below:

                        
1       ORG = 100
2       AC = 100
3       PTR = 100
4       AC = -100 
5       CTR = -100
6       AC = 0
                        
                    

Subroutines

• In computer programming, a subroutine is a fundamental concept that allows for the reusability of a set of instructions within a program. A subroutine is essentially a self-contained sequence of instructions that can be invoked or called upon by the main program whenever needed. Subroutines play a crucial role in modularizing code and simplifying program structure.
• When a program needs to execute a subroutine, it does so using a branching instruction, often referred to as "Branch and Save Address" (BSA). This instruction allows the program to transfer control to the subroutine, which performs a specific task. Once the subroutine completes its execution, it is designed to return control to the main program. Importantly, a program can initiate a branch to the subroutine from any part of its main code, enhancing flexibility and reusability.
• To ensure a smooth return from the subroutine to the main program, it's necessary to store the return address. This return address indicates where in the main program the execution should resume after the subroutine finishes its task. The BSA instruction, which stands for "Branch and Save Address," serves this purpose by both initiating the subroutine and preserving the return address.
• As an example, let's consider a subroutine named "SH4" that performs a left shift operation on the contents of the accumulator (AC) four times. In a program, the sequence of actions might start by loading a value, let's call it "X," into the accumulator (AC). The next instruction would be "BSA SH4," invoking the subroutine called "SH4." To ensure that the program knows where to continue after the subroutine completes, the BSA instruction automatically saves the return address (in this case, 102 + 1) in the Program Counter (PC).
• Following the BSA instruction, the program proceeds to memory location 109, where the subroutine "SH4" is executed, performing the desired left shift operation. The last instruction of the subroutine, "SH4 I," facilitates the return to the main program. It does so by instructing the control unit to return to the address specified by the Program Counter (PC), which, in this case, is 102.

Program to demonstrate the Use of Subroutines

                    
Location   Assembly Code    Explanation
            ORG 100        ;Main program
100         LDA X          ;Load X
101         BSA SH4        ;Branch to subroutine
102         STA X          ;Store shifted number
103         HLT

;Subroutine to shift left 4 times 
104         SH4, HEX 0     ;Store return address here 
105         CIL            ;Circulate left once 
106         CIL             
107         CIL             
108         CIL            ;Circulate left fourth time
109         BUN SH4 I      ;Return to main program
            END
            
                

Input-output programming

• In the realm of computer programming, input and output operations play a crucial role in interacting with external devices and facilitating communication between the computer and its users. These operations often involve processing symbols represented as strings of characters, with each character typically consisting of 8 bits.
• When a user interacts with the computer, such as by pressing a key on the keyboard, a specific set of instructions comes into play. To handle input, an "INP" (input) instruction is executed, while for displaying a character, an "OUT" (output) instruction is employed. These instructions bridge the gap between the computer's internal binary representation and the human-readable characters.

Table A - Program to Input Character

                    
    Assembly Code     Explanation
CIF   SKI             ;Check input flag 
      BUN             ;Flag = 0, branch to check again 
      INP             ;Flag = 1, input character 
      OUT             ;Print character 
      STA CHR         ;Store character
      HLT
                    
                

Table B - Program to Output one character:

                    
    Assembly Code    Explanation
       LDA CHR       ;Load character into AC 
COF,   SKO           ;Check output flag 
       BUN COF       ;Flag = 0, branch to check again
       OUT           ;Flag = 1, output character
       HLT
                    
                

Control Unit Design: Hardwired vs. Microprogrammed

• In the realm of control unit design, two distinct approaches are employed: hardwired design and microprogrammed design. These approaches dictate how control signals are generated and executed within a digital computer system.
• In a hardwired design, control signals are generated directly by dedicated hardware components. These components are carefully designed to produce the required control signals based on the system's architecture and operational requirements.
• Conversely, in a microprogrammed design, control signals are generated using microprograms, which are software-based instructions. These microprograms are stored in a specialized memory called "control memory." A microprogrammed control unit typically encompasses two separate memory components: a main memory and a control memory.
• It's important to note that while the contents of the main memory may change during program execution, the contents of the control memory remain static and cannot be altered by the user. This distinction is crucial for maintaining the integrity of the control instructions and ensuring the proper functioning of the control unit.
• The general configuration of a microprogrammed control unit includes the following key elements:
  • Control Memory: This memory component stores all the control information required for the execution of microprograms. The Control Memory Address Register (CAR) is responsible for providing the address of the microinstruction stored in the Control Memory.
  • Control Data Register (CDR): The CDR serves as a temporary storage location for the data fetched from the control memory. It holds the binary data associated with the current microinstruction.
  • Next Address Generator (Sequencer): The Next Address Generator, often referred to as the Sequencer, plays a vital role in the microprogrammed control unit. It is responsible for fetching the address of the next microinstruction to ensure the orderly progression of instructions within the microprogram.
• As an illustrative example, consider a scenario where the Control Memory Address Register (CAR) contains the address "010." In this case, the data "1101" is retrieved from the Control Memory and placed into the Control Data Register (CDR) for further processing.
• This data handling process, combined with the sequencer's function, facilitates the proper execution of microprograms within the microprogrammed control unit.

There are four methods to determine the address of the next instruction:

1. Incrementing CAR by 1:
   • In this method, the contents of the Control Address Register (CAR) are incremented by 1. The new value represents the address of the next instruction.
2. Subroutine Call:
   • Subroutines are analogous to functions in a C program. Subroutines consist of instructions that are executed multiple times.
     • When a subroutine is called, the address of the next instruction is stored in the Subroutine Register.
     • Program control then transitions to the subroutine (function definition) and executes its instructions.
     • Once the subroutine is completed, the address stored in the Subroutine Register is used to locate the address of the next instruction in the program.
3. Unconditional / Conditional Branch:
   • In an unconditional branch instruction, no conditions are assessed. However, in conditional branch instructions, a specific condition must be true for branching to occur. In both cases, certain flag bits (often referred to as Status bits) are examined to determine the address of the next instruction.
4. Mapping:
   • Mapping involves the utilization of mapping functions to ascertain the address of the next instruction within the program."

Control Signals

• Control signals convey information about operations, sequence of operations, and timing.
• Used to determine the operation to be performed.
• Indicate the sequence of processor operations.
• Specify the timing for operation execution and more.

Hardwired Control Unit

The hardwired control unit is responsible for generating control signals that orchestrate the execution of instructions with precision in terms of timing and sequence. When compared to micro-programmed control units, the hardwired CU exhibits generally superior speed and efficiency. It achieves this by employing a combination of a Programmable Logic Array (PLA) circuit and a state counter, using hardware-based mechanisms to generate control signals, essentially embracing a circuitry-centric approach.

To provide a comprehensive understanding of the "generation of control signals" within a hardwired control unit, let's delve into its components step by step.

• The Instruction Register: This crucial component plays a pivotal role in generating the opcode bits corresponding to both the operation and the addressing mode of operands.
• Instruction Decoder: The opcode bits generated earlier are fed into the instruction decoder, which interprets the operation and the addressing mode of the instruction. Based on these factors, the instruction decoder sets the corresponding Instruction signal (INSi) to 1. The execution of each instruction typically involves several steps, including instruction fetch, decode, operand fetch, arithmetic and logical operations, and memory storage. While the specific steps may vary across different sources, these five steps generally characterize the execution of an instruction.
• Step Counter: It is crucial for the control unit to keep track of the current step in the instruction execution process. To facilitate this, a Step Counter is implemented, capable of holding signals from T1 to T5. Depending on the step within which the instruction currently resides, one of these step counter signals will be set to 1.
• Clock: How does the Step Counter discern the current step of instruction execution? This task is accomplished by employing a Clock. Each clock cycle corresponds to one step. For instance, if the Step Counter sets T3 to 1, it will advance to T4 after the completion of one clock cycle.
• Interrupt Handling: A pertinent question arises: what happens if the execution of an instruction is interrupted for some reason? Will the Step Counter continue to be triggered by the clock? The answer is no. While the execution of the current step is ongoing, the Counter Enable function will "disable" the Step Counter, ensuring that it halts temporarily and subsequently increments to the next step signal once the current step is completed.
• Conditional Execution: In scenarios where the execution of an instruction depends on certain conditions, Condition Signals come into play. These signals are generated using control signals and encompass conditions such as less than, greater than, less than or equal to, greater than or equal to, and many more.
• External Input: The last component, External Input, plays a crucial role in informing the Control Signal Generator about interrupts that could impact the execution of an instruction.

Thus, based on input received from conditional signals, the step counter, external inputs, and the instruction register, the control signals are meticulously generated with the assistance of the Control Signal Generator, ensuring the seamless execution of instructions.

Micro-programmed Control Unit

• A micro-programmed control unit can be characterized as a straightforward logic circuit with dual capabilities:
• Firstly, it can execute instructions by generating control signals.
• Secondly, it can sequence through microinstructions to determine the control signals needed for each step of instruction execution.

These control signals are generated based on programmed sequences, making it a valuable approach during the era of Complex Instruction Set Computer (CISC) architecture. The program responsible for crafting these control signals is known as the "Micro-program," which is stored on the processor chip, often referred to as fast memory or the control store/control memory.

• A micro-program comprises a collection of microinstructions, also known as control words. Each microinstruction contains distinct bit patterns, typically n-bit words. These bit patterns serve as the blueprint for generating specific control signals, differentiating them from one another.
• Similar to other control units, micro-programmed control units execute instructions in discrete steps. Each step corresponds to a specific microinstruction within the micro-program. To execute a particular instruction, a sequence of microinstructions is employed, collectively known as a "micro-routine."
• Let's delve into the organizational structure of a Micro-programmed Control Unit, including the arrangement of micro-programs, micro-routines, and control words/microinstructions. We'll also explore the flow of instruction execution, detailing the steps involved in this process.
  
  • Instruction fetch is the first step. In this step, the instruction is fetched from the IR (Instruction Register) with the help of a Microinstruction address register.
  • Decode is the second step. In this step, the instructions obtained from the instruction register will be decoded with the help of a microinstruction address generator. Here we will also get the starting address of a micro-routine. With the help of this address, we can easily perform the operation, which is mentioned in the instruction. It will also load the starting address into the micro-program counter.
  • Increment is the third step. In this step, the control word, which corresponds to the starting address of a micro-program, will be read. When the execution proceeds, the value of the micro-program counter will be increased so that it can read the successive control words of a micro-routine.
  • End bit is the fourth step. In this step, the microinstruction of a micro-routine contains a bit, which is known as the end bit. The execution of the microinstruction will be successfully completed when the end bit is set to 1.
  • This is the last step, and in this step, the micro-program address generator will again go back to Step 1 so that we can fetch a new instruction, and this process or cycle goes on.
• So in the micro-programmed control unit, the micro-programs are stored with the help of Control memory or Control store. The implementation of this CU is very easy and flexible, but it is slower as compared to the Hardwired control unit.

Difference between hardwired and microprogrammed CU